imisg502 system clock chip april 1996 cmos lsi spectrum spread clock international microcircuits, inc. 525 los coches st. milpitas, ca 95035 tel: 408-263-6300 fax 408-263-6571 page 1 of 7 product features n generates cpu clock signals for microprocessor systems n reduces measured emi by 10 db nominal n 4v to 7v operating supply range n supports 80286-, 80386-, 80486-, pentium ? - and 29000-based designs n wide range of selectable output frequencies including 40, 33.3, 16.7 n single, low cost crystal used as reference frequency n glitch-free switching n 50% duty cycle n power down mode for low power consumption n ttl or cmos compatible outputs with 6 ma drive capability n low, short and long term jitter (cycle-to-cycle jitter less than 50 ps) n 16 pin pdip and 16 pin soic (300 mil body) package options block diagram product description the imisg502 is a spectrum spread clock generator specially designed for personal computers, laser printers and other digital systems. imisg502 uses a patented concept to generate popular clock frequencies that are intentionally broadbanded to reduce electromagnetic interference. the imisg502 attenuates the radiated emission amplitudes from products associated with either the clock harmonics or any signals derived from the clock signals nominally 10 db and could significantly reduce the cost of complying with the regulatory requirements. prclk is the broadbanded output and can be programmed to generate 40, 33.3, 16.7 and 12 mhz with s0 and s1 pins. a single, low cost external crystal is required as reference frequency for the synthesizer. output modulation function can be turned off with the sson pin. several power down modes add the flexibility to operate the device in a completely static mode to reduce standby currents and simplify system board tests. p-dip/soic diagram applications the imisg502 eliminates the need for multiple oscillators and generates the cpu clock signals for personal computers, laser printers and other digital systems. supports 8086-, 80286-, 80386-, 80486-, pentium ? - and 29000-based designs. imisg502 can be used with laptop or notebook computers to save power by running the system slower than normal cpu speeds or completely disabling the clocks in standby mode. ref spectrum spread clock gen /4 or /12 /2 14 mpclk prclk 44.2 mhz mpsel 12 lf s0 s1 test ssor 3 2 5 10 7 8 16 9 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 vdd oscin oscout vss mpsel avdd s0 s1 test vdd mpclk vss prclk avss lf1 sson
imisg502 system clock chip april 1996 cmos lsi spectrum spread clock international microcircuits, inc. 525 los coches st. milpitas, ca 95035 tel: 408-263-6300 fax 408-263-6571 page 2 of 7 pin description oscin oscout- these pins form an on-chip reference oscillator when connected to terminals of an external 44.2 mhz third overtone parallel resonant crystal. oscin may also serve as an input for an externally generated cmos level or ac coupled reference signal. s0 and s1- standard frequency select inputs. these inputs control the prclk frequency selection. s0-s1 inputs control the cpu clock frequencies. all these inputs have internal pull-downs. table 1 shows the output frequency selection conditions. test- controls power down and test mode selection. when high, s0-s1 and mpsel controls the mode selection as shown on table 1 and table 2. when low, the device operates in normal mode. this pin has an internal pull-down. mpsel - controls mpclk output frequency selections. table 2 shows the selected frequencies for mpclk. this input has an internal pull-up. sson - this is the control output for the clock generator. it is a single-ended, tri-state output. component connections are shown in figure 1. lf1- loop filter, phase detector outputs for the clock generators. it is a single-ended tristate output for use as a loop error signal. see figure 1 for circuit. prclk frequency selection inputs output test s1 s0 prclk 0 0 0 n/a 0 0 1 16.7 mhz 0 1 0 33.3 mhz 0 1 1 40.0 mhz 1 0 0 0; power down 1 0 1 1; power down 1 1 0 test 1 1 1 hi-z table 1: when power down address is selected, the vco is turned off and the device goes into standby. mpclk - this is a non modulated output. this output can be programmed to be 3.7 mhz or 11.06 mhz. the selection of these frequencies is controlled by the mpsel pin shown in table 1 . prclk - output from the spectrum spread clock generator. frequency selection is shown on table 1. when the sson pin is high, outputs are not modulated. when sson is low, sprectrum spread function is enabled. vss- circuit ground. vdd- positive power supply. avdd- analog positive power supply. avss- analog circuit ground. mpclk frequency selection inputs output test mpsel s1 s0 mpclk 0 0 x x 3.7 mhz 0 1 x x 11.06 mhz 1 x 0 0 0; power down 1 x 0 1 1; power down 1 x 1 0 test 1 x 1 1 hi-z table 2: when power down address is slected, the vco is turned off and the device goes to standy mode. phase detector is in tri-state mode. loop filter figure 1 lf 2k r2 330 pf c1 2200 pf c2
imisg502 system clock chip april 1996 cmos lsi spectrum spread clock international microcircuits, inc. 525 los coches st. milpitas, ca 95035 tel: 408-263-6300 fax 408-263-6571 page 3 of 7 maximum ratings voltage relative to vss -0.3 voltage relative to vdd 0.3v storage temperature: -65 to +150 c ambient temperature: -0 c to + 70 c maximum supply voltage: 7.0v this device contains circuitry to protect the inputs against damage due to high static voltages or electric field; however, precautions should be taken to avoid application of any voltage higher than the maximum rated voltages to this circuit. for proper operation, vin and vout should be constrained to the range: vss<(vin or vout)< vdd unused inputs must always be tied to an appropriate logic voltage level (either vss or vdd). electrical characteristics characteristic symbol min typ max units input low voltage vil - - 0.8 vdc input high voltage vih 2.0 - - vdc input low current with pull-up/ pull-down i ih /i il - - 10/100 m a output low voltage iol = 6ma vol - - 0.4 vdc output high voltage ioh=6ma voh 2.5 - - vdc tri-state leakage current ioz - - 10 m a static supply current idd - - 250 m a dynamic supply current icc - 25 30 ma short circuit current isc 25 - - ma vdd = 5v + 10%, ta = 0 c to +70 c
imisg502 system clock chip april 1996 cmos lsi spectrum spread clock international microcircuits, inc. 525 los coches st. milpitas, ca 95035 tel: 408-263-6300 fax 408-263-6571 page 4 of 7 switching characteristics characteristic symbol min typ max units output rise and fall time measured at 10% - 90% of v dd t tlh, t thl - - 5 ns output rise and fall time measured at 0.8v - 2.0v t tlh, t thl - - 3 ns output duty cycles tsymf1 - - 45/55 % jitter one sigma tj1s - - 2 % of fout vdd = 5v + 10%, ta = 0 c to 70 c, cl = 15 pf oscillator characteristics characteristic symbol min typ max units conditions transconductance g m 20 80 180 millimhos @ 44.2 mhz output impedance z o - 200 800 ohms @ 44.2 mhz input capacitance c i 8 13 18 pf output capacitance co 3 6 9 pf dc bias voltage v b 1.5 vdd/2 3.5 volt start-up time t s - - 2 ms @ vdd = 4.5v duty cycle tsymf1 - - 45/55 % input rise time oscin iclkr - - 20 ns vco characteristics characteristic symbol min typ max units conditions vco gain ko 35 55 65 mhz/volt d f/ d v measured with vco control at 2v - 3v phase detector gain kd 100 145 200 m a
imisg502 system clock chip april 1996 cmos lsi spectrum spread clock international microcircuits, inc. 525 los coches st. milpitas, ca 95035 tel: 408-263-6300 fax 408-263-6571 page 5 of 7 external connections 1 2 3 4 5 6 7 8 dvdd c3 10pf c4 10pf l2 1.2uh .033uf c7 10pf c6 .1uf c5 16 15 14 13 12 11 10 9 vdd xin xout vss mpsel avdd s0 s1 test vdd mpclk vss prclk avss lf1 sson dvdd avdd dvdd dvdd avdd digital gnd plane analog gnd plane 1 2 jp5 header c9 .1uf mpsel jp1 jp2 jp3 jp4 test s1 s0 c2 2200pf c1 330 pf c10 22uf 10 ohms c11 10uf r1 1.5 uh l1 vcc c8 .1uf sg502 note1: keep c3, c4, c5, c6 close to their pins (4,11,13,10,9 respectively)
imisg502 system clock chip april 1996 cmos lsi spectrum spread clock international microcircuits, inc. 525 los coches st. milpitas, ca 95035 tel: 408-263-6300 fax 408-263-6571 page 6 of 7 package drawing and dimensions 16 pin soic outline dimensions inches millimeters symbol min nom max min nom max a 0.097 0.101 0.104 2.46 2.56 2.64 a 1 0.0020 0.009 0.0015 0.060 0.22 0.38 a2 0.090 0.092 0.111 2.29 2.34 2.39 b 0.014 0.016 0.019 0.35 0.41 0.48 c 0.0091 0.010 0.0125 0.23 0.25 0.32 d .399 .407 .412 10.13 10.34 10.46 e 0.285 0.296 0.299 7.24 7.52 7.59 e 0.050 bsc 1.27 bsc h 0.400 0.406 0.40 10.16 10.31 10.41 a 0 5 10 0 5 10 l 0.24 0.032 0.040 0.61 0.81 1.02 16-pin plastic dip dimensions inches millimeters symbol min nom max min nom max a 0.150 0.160 0.170 3.81 4.06 4.318 a 1 0.015 - - 0.381 - - b 0.016 0.018 0.020 0.40 0.45 0.50 b 1 0.056 0.059 0.062 1.47 1.52 1.57 b 2 0.046 0.049 0.052 1.17 1.24 1.32 c 0.008 0.010 0.012 0.20 0.25 0.30 d 0.748 0.750 0.752 19.00 19.05 19.10 e 0.300 0.312 0.325 7.62 7.924 8.255 e 1 0.240 0.252 0.260 6.096 6.49 6.604 e 2 0.335 0.345 0.355 8.51 8.76 9.01 e 1 0.100 bsc 2.54 bsc l 0.25 0.230 0.135 3.175 3.30 3.429 a 0 7 15 0 7 15 q 1 0.059 0.060 0.061 1.50 1.53 1.55 q 2 0.128 0.130 0.132 3.25 3.30 3.35 s 0.073 0.075 0.077 1.85 1.90 1.95 e2 c a e e1 d b e a a 1 a 2 e h a l c d a1 a l b b1 e1 s q q2 b2
imisg502 system clock chip april 1996 cmos lsi spectrum spread clock international microcircuits, inc. 525 los coches st. milpitas, ca 95035 tel: 408-263-6300 fax 408-263-6571 page 7 of 7 ordering information part number package type production flow imisg502xpb 28 pin plastic dip commercial, 0 c to + 70 c imisg502xxb 28 pin soic commercial, 0 c to + 70 c note : the ?x? following the imi device number denotes the device revision. the ordering part number is formed by a combination of device number, device revision, package style, and screening as shown below. marking : example : imisg502 xpb date code, lot # imisg502xpb flow b = commercial, 0 c to + 70 c package p = plastic dip x = small outline revision imi device number
|
